Image sensors have been used as sensors for autofocusing in single-lens reflex cameras. It is desirable, from the standpoint of users that an image sensor automatically provides a manageable output voltage level. FIG. 3 shows a conventional image sensor that automatically sets a desired level for the video output. The image sensor 50 shown in FIG. 3 is arranged to detect the desired output voltage level of the video signal or the picture element information from a photodiode array 51 by detecting the difference between the photosensitivity of a monitor photodiode 54A and the photosensitivity of a photodiode array 51.
More specifically, in the image sensor 50 the photodiode array 51 performs photoelectric conversion. A shift gate 53 controls the timing for transferring the picture element information from the photodiode array 51 to a charge coupled device (CCD) 52 and a video output means 54 accumulates and outputs picture element information from the charge coupled device 52. The image sensor 50 is further provided with a monitor photodiode 54A having a photosensitivity of n times that of each photodiode in the photodiode array 51. A monitor output means 55 outputs the monitor output voltage from the monitor photodiode 54A and monitor compensation output means outputs a monitor compensation output signal.
The charge accumulated in respective photodiodes of the photodiode array 51 and the charge accumulated in the monitor photodiode 54A are reset by a reset gate 57. The video output means 54, the monitor output means 55, and the monitor compensation output means 56 are of the same construction, and include respective capacitance elements 58, 59, and 60 that are provided with a reference voltage Vref through switching elements 61, 62, and 63, respectively. The information accumulated across the respective capacitance elements 58, 59, and 60 are outputted to the outside via buffer circuits 64, 65, and 66, respectively. With the image sensor 50 thus arranged, a reset signal RST is applied to the reset gate 57 to open the reset gate 57 to reset charge accumulated in each photodiode in the photodiode array 51 and the monitor photodiode 54A. Further, the reset gate 57 opens to cause the switching elements 62 and 63 to be on, and the voltages across capacitance elements 59 and 60 of the monitor output means 55 and the monitor compensation output means 56 are initially set to the reference voltage Vref.
A first clock signal .phi..sub.1 of the charge coupled device 52 causes the switching element 61 to be on and then the voltage across capacitance element 58 of the video output means 53 is maintained at the reference voltage Vref. When the reset gate 57 closes, an amount of light incident upon each photodiode of the photodiode array 51 is photoelectrically converted into a video signal or picture element and is accumulated in the photodiode.
Since the monitor photodiode 54A has a photosensitivity n times higher than each photodiode of the photodiode array 51, a charge approximately n times larger than the output of each of the photodiodes of the photodiode array 51 is accumulated in the monitor photodiode 54A. Thus, the voltage across the capacitance element 59 of the monitor output means 55 decreases rapidly. The output voltage of the monitor output MOUT, which is read out via a buffer circuit 65, is detected, and the time required for this output voltage to reach a desired level is used for computing the time required for the photodiode array 51 to accumulate charge, for example, a period n times longer.
When the computed time period has lapsed, respective photodiodes of the photodiode array 51 can be expected to have been charged sufficiently to provide a desired voltage level. The shift gate is opened to transfer the charge accumulated in respective photodiodes to the charge coupled device 52. The charge coupled device 52 causes the desired output voltage level to be output in the form of the voltage across the capacitance element 58. Thus, a picture element or video output is indicated by the value VOUT via the buffer circuit 64. In this manner, with the image sensor 50 shown in FIG. 3, the monitor output MOUT from the monitor photodiode 54A is detected to compute, on the basis of the time when the output voltage reaches the desired level, the time required for the capacitance element 58 to be charged up. In this manner, the desired level of the video output may be obtained.
The image sensor 50 of FIG. 3 is shown in FIG. 4 as being arranged such that the photodiode array 51 is disposed at the center and the monitor photodiode 54A is disposed at the periphery. The image sensor 50 is generally used in combination with optical systems as shown in FIG. 5. The optical system in FIG. 5 consists of a mount lens 71, a half mirror 72, a mirror 73, a slit 74, a focus lens 75, and a dual focus lens 76. With such an optical system, the light through the mount lens 71 passes through the half mirror 72 and the mirror 73, and a slit image is formed by the slit 74. The slit image passes through the focus lens 75 and the dual focus lens 76 to focus on the image sensor 50. An equal energy plane of the slit image of luminous flux is designated by SB in FIG. 4. Therefore, the isoenergy plane covers the photodiode array 51 but does not completely cover the monitor photodiode 54A. This means the isoenergy plane varies, leading to inaccurate detection of the output voltage level of the video signal from the photodiode array 51 on the basis of monitor output MOUT from the monitor photodiode 54A.
On the other hand, if the equal energy plane is enlarged to define a wider area to encompass the monitor photodiode 54A, then the slit image is enlarged and the energy density of the light decreases. This causes another problem in that higher sensitivity or better S-N ratio is further required to maintain necessary total sensitivity or S-N ratio of the video signal output.